In processing a received signal, the signal may have an unintended DC offset component that was not part of the original signal. This DC offset component may be introduced by a variety of sources as the signal is processed by the circuitry or in the stream. This DC offset component causes distortion and creates further undesirable effects to downstream circuitry. Thus, the removal of this undesirable DC offset component becomes an important issue in many applications. Furthermore, a received signal as is processed may also drift such that it no longer conforms to its original signal DC level. This signal will need to be re-aligned back to its original level or aligned at a desired level.
For example, zero-intermediate-frequency (Zero-IF) architectures have become very popular in radio frequency (RF) receivers due to its lower requirements on channel select filters and amplifiers. This type of architecture demands that the signal to be processed at low frequencies that are very close to zero. Hence, the removal of undesirable DC offset (at zero frequency) generated by mismatch, local oscillator (LO) leakage, or self-mixing without damaging low-frequency signal is a critical issue. Many transceivers use calibration techniques to remove DC offset. Although calibration techniques can effectively remove DC offset caused by mismatch and LO leakage, DC offset caused by self-mixing of a strong interferer and other operation-dependent sources can not be easily predicted and canceled. Calibration techniques also considerably increase circuit complexity and require close collaboration between analog and digital receiver chips.
Another method for DC offset removal is the insertion of a simple RC filter, as is illustrated in FIG. 1, which utilizes a capacitor to block DC voltage level and a resistor to provide DC bias for the following circuits. Cut-off frequency of this RC circuit should be small enough to reduce attenuation of signal intensity and group delay and be large enough to be able to settle to near asymptotic state within a required time that is specified by the standard. For example, in the IEEE802.11 standards for wireless local area network (WLAN) applications, cut-off frequency of less than 10 KHz is desired. A naïve implementation of this circuit with frequency this low would take hundreds of microseconds to settle. However, the standard also requires DC offset cancellation circuit to settle within a period of 800 nS, three orders of magnitude lower. Previous works by others have implemented switchable RC filters that can switch cut-off frequency from high to low in three or more steps. This method cannot reliably settle because the switching action itself will generate a DC offset depending on the signal levels at the input and the output at the switching instant. The fundamental reason of switching-induced DC offset will be explained in more details later in this disclosure.
In analyzing a simple RC filter as illustrated in FIG. 1, a differential equation can be derived to describe the filter's behavior in the time domain.
                              C          ⁢                                          ⁢                                    ⅆ                              (                                                      V                    out                                    -                                      V                                          i                      ⁢                                                                                          ⁢                      n                                                                      )                                                    ⅆ              t                                      =                  -                                    V              out                        R                                              (        1        )            With the initial conditionVout|t=0=V0   (2)The solution is
                                                                                          V                  out                                =                                                                                                    ∫                        0                        t                                            ⁢                                                                        p                          ⁡                                                      (                                                          t                              ′                                                        )                                                                          ⁢                                                                              ⅆ                                                                                          V                                                                  i                                  ⁢                                                                                                                                          ⁢                                  n                                                                                            ⁡                                                              (                                                                  t                                  ′                                                                )                                                                                                                                          ⅆ                                                          t                              ′                                                                                                      ⁢                                                  ⅆ                                                      t                            ′                                                                                                                +                                          V                      0                                                                            p                    ⁡                                          (                      t                      )                                                                                  ,                                                                          p                ⁡                                  (                  t                  )                                            =                              ⅇ                                                      ∫                    0                    t                                    ⁢                                                                                    (                        RC                        )                                                                    -                        1                                                              ⁢                                          ⅆ                                              t                        ′                                                                                                                                                    (        3        )            Define cut-off frequency fT to be:
                              f          T                =                  1                      2            ⁢                                                  ⁢            π            ⁢                                                  ⁢            R            ⁢                                                  ⁢            C                                              (        4        )            Assume that at time t=t0, the cut-off frequency is changed from fT to fT′ and the input signal can be decomposed into
                              V                      i            ⁢                                                  ⁢            n                          =                              ∑                          n              =              0                        m                    ⁢                                    A              n                        ⁢                          ⅇ                              j                ⁢                                                                  ⁢                                  (                                                                                    ω                        n                                            ⁢                      t                                        +                                          ϕ                      n                                                        )                                                                                        (        5        )            If ωT=2πfT is assumed to be constant, it can be derived that
                              V          out                =                              ∑                          n              =              1                        m                    ⁢                      {                                                            1                                      1                    -                                          j                      ⁢                                                                                          ⁢                                                                        ω                          T                                                                          ω                          n                                                                                                                    ⁢                                  A                  n                                ⁢                                  ⅇ                                      j                    ⁡                                          (                                                                                                    ω                            n                                                    ⁢                          t                                                +                                                  ϕ                          n                                                                    )                                                                                  +                                                V                  0                                                  p                  ⁡                                      (                    t                    )                                                              -                                                                                          A                      n                                        ⁢                                          ⅇ                                              j                        ⁢                                                                                                  ⁢                                                  ϕ                          n                                                                                                                          p                    ⁡                                          (                      t                      )                                                                      ·                                  1                                      1                    -                                          j                      ⁢                                                                                          ⁢                                                                        ω                          T                                                                          ω                          n                                                                                                                                          }                                              (        6        )            In Equation (6), it is evident that the output voltage consists of three components: the desired signal represented by the first term in the bracket; the decaying voltage caused by initial condition of output voltage; and the decaying term caused by the instantaneous input signal level at initial time. Equation (6) shows that frequency switching will introduce other DC offset voltages itself while removing DC offset changes from the input. This switching-induced DC offset is proportional to the input signal amplitude and depends on the signal level at the input and the output at the switching instant. One of the challenges here is to remove this DC offset voltage in a fast and efficient manner so that information can be extracted from the signal.
Innovative circuits and methods for fast-settling signal alignment and for removing of DC offset are therefore desired to overcome the shortcoming of prior art technologies.